Using this integrated design environment professional engineers can create and implement complex FPGA layouts. There is a highly customizable schematic editor.
Lattice Diamond is a Windows application for designing field programmable gate arrays. It contains an HDL simulator for verifying projects before implementation. Moreover, a synthesis engine for converting code into a gate level netlist is available.
Similar to Libero SoC, there is support for symbol creation and management. You can view generated waveforms and adjust FPGA parameters accordingly. It is possible to run simulations in a variety of HDL languages, including VHDL and Verilog.
The integrated placement and routing engine is intended for optimizing the production process of FPGA gates and interconnects. Users are able to take into account a variety of factors like power and area. Supported hardware models include the ECP, ECP5, MachXO3, MachXO3D and Certus series of Lattice FPGAs.
You can automatically verify the timing of the design. This functionality is helpful for ensuring full performance and flexibility before deploying the project.
Lattice Diamond generates the bitstream that is used to program the FPGA. It contains all information that is required to configure the internal fabric.
- free to download and use;
- helps circuit engineers create and test FPGA designs;
- there are powerful simulation instruments for project validation;
- supports a wide range of FPGA models manufactured by Lattice;
- you can use the provided placement and routing engine to optimize the layout;
- compatible with modern versions of Windows.